Analyses / Removable flash
Reading an SD card label: capacity, speed and the host
/ Source review
Read an SD card label as several separate promises. SDXC describes capacity; UHS-I describes a bus; V30 and A2 describe different performance requirements. None alone tells you what a particular host will sustain.
On this page7 sections
Four questions hidden in one label
| Mark or format | Question it answers | Still check |
|---|---|---|
| SD / microSD | Which physical form? | Slot and adapter compatibility |
| SDHC / SDXC / SDUC | Which capacity family? | Host capacity and file-system support |
| UHS-I / SD Express | Which interface? | Negotiated mode and host path |
| C / U / V / E; A1 / A2 | Which performance contract? | Matching class family and operating conditions |
The capacity ranges are up to 2 GB for SD, over 2 through 32 GB for SDHC, over 32 GB through 2 TB for SDXC, and over 2 through 128 TB for SDUC. The associated formats are FAT12/FAT16, FAT32, exFAT and exFAT respectively. These are standard ranges, not a catalogue of available products. [Capacity]
Similarly, UHS-I's 104 MB/s and the 985 MB/s PCIe Gen3 single-lane SD Express ceiling describe interfaces. They do not measure a card's sustained write throughput. [Bus]
Match the recording class, not just the number
C10, U1 and V10 all refer to 10 MB/s, but use different class families and access rules. SDA explicitly warns against treating matching numeric rates across families as sufficient host/card matching. U3 is a performance class; UHS-III is a bus. [Classes]
Free capacity also differs from space suitable for class-governed recording. SDA describes recording into completely free allocation units: fragmentation can prevent that access pattern even when aggregate free space remains. This connects to why free bytes do not describe free-space layout.
Express classes E150/E300/E450/E600 add minimum read/write rates of 150/300/450/600 MB/s under their specified rules. SD 9.1 includes host handling of streams, power and temperature. The E label is therefore not a throughput guarantee for arbitrary I/O. [Express classes]
A2 needs the right operating conditions
| Class | Random read | Random write | Sequential write |
|---|---|---|---|
| A1 | 1,500 IOPS | 500 IOPS | 10 MB/s |
| A2 | 4,000 IOPS | 2,000 IOPS | 10 MB/s |
A subtle exception appears in Physical Layer Simplified Specification 7.10, section 4.16.1.2: SD Express and SDUC cards may meet A2 without command-queue support. If they support it, it must be enabled and used; other A2 card types require it. Cache must be enabled. With queue and cache disabled, A2 cards must satisfy A1 conditions. [Version-pinned clause]
That is why neither a blanket claim that every A2 card requires queuing nor the opposite claim that host features never matter is precise. The label must be interpreted with card type, implementation and test conditions.
Caching also creates a completion distinction. SDA's explanation requires the host to flush before power-down and allows loss of data not yet moved to nonvolatile storage. A performance class is not a power-loss-protection rating. [Cache] See power-loss failure boundaries.
The 1.8 W limit has a version boundary
The May 2025 host guideline, section 4.2, limits SD 7.x cards in PCIe mode to 1.80 W and explicitly permits higher power for SD 8 cards. Our previous SD Express record overgeneralized this limit; it is now corrected. [Host guideline]
Express also retains a legacy SD path. Using an older compatible host does not activate PCIe/NVMe, and the legacy path is UHS-I rather than UHS-II. Check the actual host mode before diagnosing a slow card.
A controller paper shows where the speed can disappear
Vanoni and colleagues' 2026 preprint studies an SDHCI 1.0 controller integrated into the Cheshire RISC-V platform. Their 50 MHz host / 25 MHz SD Linux test transfers 4 MB through ext4 with dd, cache bypass and synchronization. Custom register-access callbacks increase reported reads from 224 to 945 kB/s and writes from 159 to 485 kB/s. The authors identify costly CVA6 fences when cache-management operations are unavailable. [Paper, sections 3-4]
Its separate idealized peripheral test reports 11.1 MB/s reads; this is not the Linux result. The 500 MHz configuration is an extrapolation. The paper does not establish an A2 compliance result, a population estimate across cards, or a safe general recommendation to remove memory-ordering fences.
The practical diagnostic order follows from these distinctions: confirm capacity support, observe the negotiated interface, match the performance class, then inspect the host's I/O path and workload. Benchmark that combination, not the printed number alone.
Scope and connected definitions
Source review, not a card benchmark or compliance test. The controller paper reports one platform and distinguishes measured configurations from a frequency extrapolation. Simplified specifications do not replace complete licensed implementation specifications. No SD hardware experiment was performed for this article.
Structured references: capacity family, speed class, Application Performance Class and SD Express.
Sources
- SD Association: capacity families and file systems
- SD Association: bus modes and interface ceilings
- SD Association: speed classes, host matching and free allocation units
- SD Association brochure: application-performance minimums
- SD Physical Layer Simplified Specification 7.10, section 4.16.1 (page 159)
- SD Express Host Implementation Guideline, version 2, May 2025, sections 2-5 and 4.2 power scope
- SD Association: SD Express Speed Class, SD 9.1 whitepaper, October 2023, pages 7-9
- SD Association: SD Express Cards with PCIe and NVMe Interfaces, June 2018
- Vanoni et al. Implementing and Optimizing an Open-Source SD-card Host Controller for RISC-V SoCs. arXiv:2603.11849v1, sections 3-4 (2026). DOI: 10.48550/arXiv.2603.11849
- SD Association: Applications in Action, cache flushing and A2 features