Enterprise & Datacenter SSD Form Factor

EDSFF · Enterprise and Datacenter Standard Form Factor · E1.L · E2 · E3

SFF-TA-1008 Rev 3.0a, dated July 10, 2026, prints that the SFF TA TWG changed EDSFF to Enterprise and Datacenter Standard Form Factor. Informative section 6.3 prints no sustained-power maximum apart from a connector limit of 6.6 A, which at 12 V nominal limits the form factor to 79.2 W of power, while Table 6-2 recommends 25W, 40W, 40W, and 70W only as the air-cooled sustained maximum for E3.S, E3.L, E3.S 2T, and E3.L 2T. [ta1008]

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EDSFF is a family of enterprise and datacenter device form factors with separate E1.L, E2, and E3 mechanical records, an SFF-TA-1002 card edge, and power limits that are not one shared sustained cap.

Treat EDSFF as a family of records, not one outline. SFF-TA-1008 Rev 3.0a, dated July 10, 2026, prints the renamed expansion Enterprise and Datacenter Standard Form Factor after non-SSD devices also used the family. Section 4 keeps SSDs and storage class memory as the primary usage and then lists CXL devices, accelerators, and network interface cards as additional use cases. E1.L remains its own document, SFF-TA-1007 Rev 1.3, dated September 2, 2025, and E2 is SFF-TA-1042 Rev 1.0, dated June 16, 2025. [ta1008] [ta1007] [ta1042]

Read E3 power in three layers. Table 6-1 initial slot power limits are 25W for E3.S, 40W for E3.L, 40W for E3.S 2T, and 70W for E3.L 2T. Those four figures are 12Vpinit, not a sustained cap. Table 6-2 repeats 25W, 40W, 40W, and 70W only as the recommended sustained maximum for air-cooled devices, and DLC cooled devices may exceed that recommendation. Informative section 6.3 says the connector supplies a maximum sustained current of 6.6 A, which at 12 V nominal limits the form factor to 79.2 W, further limited by the host and device operating environment. The maximum device power capability row in Table 6-1 is that same up to 79.2 W at 12 V. [ta1008]

E1.L and E2 do not inherit the E3 four-way split. SFF-TA-1007 Table 7-1 lists one E1.L initial slot power limit, 25 W, and a maximum device power capability of up to 79.2 W at 12 V. Informative section 7.3 says there is no specified maximum sustained power apart from the connector limit of 6.6 A, which at 12 V nominal limits the form factor to 79.2 W of power. SFF-TA-1042 Table 7-1 prints the same pair for E2: 12Vpinit 25 W and up to 79.2 W at 12 V. [ta1007] [ta1042]

The E2 drawing is not the E3 drawing. Dimensioning conventions in SFF-TA-1042 say all dimensions are in millimeters. Figure 5-1 prints a width of 76.00±0.25 mm. Figure 5-2 prints a length of 200.00±0.55 mm and a thickness of 9.50±0.35 mm. Section 5.1 says the device supports the 1C card edge as defined in SFF-TA-1002. Section 3.3 defines 2U as 2 standard units or rack units of 88.90 mm (3.5 inches). Rev 1.0 also prints that the SNIA IP Review Process is still in progress and is completing on August 15, 2025, and that the specification may be withdrawn if disclosures during that process affect it. [ta1042]

SFF-TA-1009 Rev 4.1a, dated May 4, 2025, is the shared pin and power table, not a form-factor outline. Table 6-1 sets 12Vpsus to the lesser of the Slot Power Limit Value in the PCI Express Base Specification and, if configured, the Power State Descriptor value in the NVM Express Base Specification, and calls it the maximum average power over any 1s period. A device shall not consume more power than the slot power limit regardless of other settings. 12Vppmax is 1.5 X 12Vpsus when 12Vpsus ≤ 25 W, 37.5 W when 25 W ≤ 12Vpsus ≤ 29 W, and 1.3 X 12Vpsus when 12Vpsus > 29 W, as maximum average power measured over any 100 µs period. The same table prints a maximum slew rate of 0.3 A/us, which does not include hot plug, a maximum inrush of 2 A averaged over any 5us during the initial power-up ramp to 90% of the device operating voltage, and a maximum inrush capacitance of 5 uF. [ta1009]

Front indicators and reference clocks are also specified by device class. SFF-TA-1008 section 5.2 says each LED aperture shall be a 1.8mm +/- 0.2mm diameter hole, and section 5.6 says E3 devices shall support two front LEDs. For NVMe SSD devices the white element shall not be implemented. Datacenter NVMe SSD Specification Version 2.5 section 10.7 puts a 5600-ppm separate-reference-clock tolerance on E3, with detection described in SFF-TA-1009. Section 10.8 prints that same 5600-ppm difference for SFF-8639 devices and points detection at the PCI Express SFF-8639 Module Specification instead. [ta1008] [ocp25]

Compared to neighbors

An E3.S 25W cell, an E1.L 25 W initial limit, and a 79.2 W connector capability are three different printed limits. DLC cooled E3 devices may exceed the air-cooled Table 6-2 recommendation without raising the connector current above 6.6 A.

Printed EDSFF power limits. Each row is the figure in that table, not a substitute for the others.
Record	Printed figure	Not the same as
E3 Table 6-1 12Vpinit	25W, 40W, 40W, and 70W for E3.S, E3.L, E3.S 2T, and E3.L 2T. [ta1008]	The sustained maximum. Those four figures are initial slot power limits.
E3 Table 6-2	25W, 40W, 40W, and 70W as the recommended sustained maximum for air-cooled devices. [ta1008]	A cap on DLC cooled devices. Section 6.3 says DLC cooled E3 devices may exceed these recommendations.
E3 section 6.3 connector	6.6 A, which at 12 V nominal is 79.2 W. [ta1008]	A host thermal allowance. The same sentence says the operating environment limits it further.
E1.L Table 7-1 and section 7.3	12Vpinit 25 W and up to 79.2 W at 12 V. No specified maximum sustained power apart from 6.6 A. [ta1007]	The E3 four-way 12Vpinit split. E1.L prints one initial limit.
E2 Table 7-1	12Vpinit 25 W and up to 79.2 W at 12 V, on a 1C device. [ta1042]	The E3 width. Figure 5-1 prints 76.00±0.25 mm and Figure 5-2 prints 200.00±0.55 mm by 9.50±0.35 mm.
SFF-TA-1009 Table 6-2 versus section 9.2	3.3 Vaux pin current 25 mA over any 100 us, and up to 1.1 A for hosts that support the 4C+ connector. [ta1009]	One current for every EDSFF pin. The 1.1 A sentence is the informative NIC chapter.

Strengths

E2 package target — SFF-TA-1042 Rev 1.0, dated June 16, 2025, defines E2 as part of EDSFF with the goal of supporting at least 64 NAND packages and fit vertically in standard 2U rack-mounted hosts. Section 3.3 defines 2U as 2 standard units or rack units of 88.90 mm (3.5 inches). [ta1042]
Not an SSD-only name — SFF-TA-1008 Rev 3.0a says that, with non-SSD devices also using EDSFF and agreement from the EDSFF Working Group, the SFF TA TWG changed EDSFF to Enterprise and Datacenter Standard Form Factor. Section 4 lists additional use cases that include CXL devices, accelerators, and network interface cards. [ta1008]
One 12 V tolerance across the pin specification — SFF-TA-1009 Rev 4.1a Table 6-1 prints 12Vtol as 10.8 to 13.2 V, including DC+AC noise up to 20 MHz. [ta1009]

Limits

E3 initial slot power is not the sustained cap — Table 6-1 prints 12Vpinit as 25W, 40W, 40W, and 70W for E3.S, E3.L, E3.S 2T, and E3.L 2T. Table 6-2 prints those same four figures only as the recommended sustained maximum for air-cooled devices. Informative section 6.3 says there is no specified maximum sustained power apart from the connector, 6.6 A and 79.2 W at 12 V nominal, and that DLC cooled E3 devices may exceed the Table 6-2 recommendations. The same revision defines DLC as Direct Liquid Cooling. [ta1008]
The 103 kPa sentence does not name the 2T variants — Section 5.2 requires E3.S and E3.L devices to support 103 kPa applied to the primary and/or secondary cooling interface areas. That sentence does not name E3.S 2T or E3.L 2T. It is the only 103 kPa sentence in Rev 3.0a. [ta1008]
3.3 Vaux device current is not the 4C+ host note — Table 6-2 prints a tolerance of 2.970 to 3.465 V and a pin current of 25 mA, the maximum averaged current over any 100 us period after the voltage reaches its operating range, with a maximum inrush capacitance of 5 uF. Informative section 9.2 says hosts that support the 4C+ connector will need to support up to 1.1 A on the 3.3 Vaux pin. Section 6.2 says there are no power sequencing requirements for 12 V and 3.3 Vaux. These two voltages are independent from each other. [ta1009]
E2 Rev 1.0 is a 1C outline with a printed IP-review date — Section 5.1 says the device supports the 1C card edge. Figure 5-1 prints a width of 76.00±0.25 mm, and Figure 5-2 prints a length of 200.00±0.55 mm and a thickness of 9.50±0.35 mm. Table 7-1 sets 12Vpinit at 25 W and maximum device power capability at up to 79.2 W at 12 V. The same Rev 1.0 text prints that the SNIA IP Review Process is still in progress and is completing on August 15, 2025, and that the specification may be withdrawn if disclosures during that process affect it. [ta1042]
The 5600-ppm clock line is not unique to E3 — Datacenter NVMe SSD Specification Version 2.5 (09282023) section 10.7 requires an E3 device's SRIS support to include a clock tolerance of a 5600-ppm difference, with detection described in SFF-TA-1009. Section 10.8 prints the same 5600-ppm words for SFF-8639 devices, where detection is described in the PCI Express SFF-8639 Module Specification. Section 10.8 is not the E3 population. [ocp25]

Typical fits

Checking whether a quoted E3 wattage is 12Vpinit, the air-cooled Table 6-2 recommendation, or the 79.2 W connector capability.
Separating an E1.L or E2 25 W initial limit from the E3 variant split.
Reading the E3 5600-ppm SRIS line without applying the SFF-8639 detection sentence in section 10.8.

Uncertainty notes

The 79.2 W figures are printed in SFF-TA-1007, SFF-TA-1008, and SFF-TA-1042. They are not a separate arithmetic note.
SFF-TA-1042 Rev 1.0 prints the IP-review sentence in the present tense, completing on August 15, 2025. That sentence is not evidence of a later withdrawal or of a completed review.
The 103 kPa requirement in SFF-TA-1008 section 5.2 names E3.S and E3.L and does not name E3.S 2T or E3.L 2T. Absence of those names in that sentence is not a finding that 2T devices are exempt.
Table 6-1 of SFF-TA-1009 prints overlapping bounds at 25 W and leaves 29 W inside the middle band and outside the upper band: 12Vpsus ≤ 25 W, 25 W ≤ 12Vpsus ≤ 29 W, and 12Vpsus > 29 W.
Datacenter NVMe SSD Specification Version 2.5 is the file dated 09282023. Later datacenter NVMe SSD specifications were not used for the 5600-ppm sentence.

Sources

01SFF-TA-1042 Enterprise and Datacenter Device Form Factor (E2), Rev 1.0, June 16, 2025 · accessed 2026-11-02
02SFF-TA-1009 Pin and Signal Specification, Rev 4.1a, May 4, 2025 · accessed 2026-11-02
03SFF-TA-1008 Enterprise and Datacenter Standard Form Factor (E3), Rev 3.0a, July 10, 2026 · accessed 2026-11-02
04SFF-TA-1007 Enterprise and Datacenter 1U Long Device Form Factor (E1.L), Rev 1.3, September 2, 2025 · accessed 2026-11-02
05Open Compute Project: Datacenter NVMe SSD Specification, Version 2.5 (09282023) · accessed 2026-11-02